Re: [PATCH] ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus

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On 14/11/2024 17:57, Romain Naour wrote:
> From: Romain Naour <romain.naour@xxxxxxx>
> 
> A bus_dma_limit was added for l3 bus by commit cfb5d65f2595
> ("ARM: dts: dra7: Add bus_dma_limit for L3 bus") to fix an issue
> observed only with SATA on DRA7-EVM with 4GB RAM and CONFIG_ARM_LPAE
> enabled.
> 
> Since kernel 5.13, the SATA issue can be reproduced again following
> the SATA node move from L3 bus to L4_cfg in commit 8af15365a368
> ("ARM: dts: Configure interconnect target module for dra7 sata").
> 
> Fix it by adding an empty dma-ranges property to l4_cfg and
> segment@100000 nodes (parent device tree node of SATA controller) to
> inherit the 2GB dma ranges limit from l3 bus node.
> 
> Note: A similar fix was applied for PCIe controller by commit
> 90d4d3f4ea45 ("ARM: dts: dra7: Fix bus_dma_limit for PCIe").
> 
> Fixes: 8af15365a368 ("ARM: dts: Configure interconnect target module for dra7 sata").
> Link: https://lore.kernel.org/linux-omap/c583e1bb-f56b-4489-8012-ce742e85f233@xxxxxxxx/

Please add the stable tag here

Cc: <stable@xxxxxxxxxxxxxxx> # 5.13

> Signed-off-by: Romain Naour <romain.naour@xxxxxxx>
> ---

-- 
cheers,
-roger





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