Hi, Geert,
On 06.11.2024 16:56, Geert Uytterhoeven wrote:
> Hi Claudiu,
>
> On Wed, Nov 6, 2024 at 9:19 AM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>>
>> While it is still correct to pass zero as the bit-clear mask it may be
>> confusing. For this, use a proper bitmask for clear bits.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
>> --- a/sound/soc/renesas/rz-ssi.c
>> +++ b/sound/soc/renesas/rz-ssi.c
>> @@ -331,7 +331,7 @@ static void rz_ssi_set_idle(struct rz_ssi_priv *ssi)
>> dev_info(ssi->dev, "timeout waiting for SSI idle\n");
>>
>> /* Hold FIFOs in reset */
>> - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_FIFO_RST);
>> + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_FIFO_RST, SSIFCR_FIFO_RST);
>
> But you're not clearing SSIFCR_FIFO_RST, you're setting it?
The bits should be set to reset the FIFOs.
By "Use a proper bitmask for clear bits" phrase in the patch title or
description I was referring at the 3rd argument of the
rz_ssi_reg_mask_setl() function, which has the following prototype:
static void rz_ssi_reg_mask_setl(struct rz_ssi_priv *priv, uint reg,
u32 bclr, u32 bset)
Would you prefer to rephrase it in the next version?
Thank you,
Claudiu Beznea
>
>> }
>>
>> static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
>
> Gr{oetje,eeting}s,
>
> Geert
>
