Re: [RFC PATCH v2 1/5] dt-bindings: net: wireless: ath12k: describe WSI properties for QCN9274

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On 10/31/2024 12:34 AM, Jeff Johnson wrote:
> On 10/29/2024 10:30 AM, Raj Kumar Bhagat wrote:
>> QCN9274 device has WSI support. WSI stands for WLAN Serial Interface.
>> It is used for the exchange of specific control information across
>> radios based on the doorbell mechanism. This WSI connection is
>> essential to exchange control information among these devices
>>
>> Hence, describe WSI interface supported in QCN9274 with the following
>> properties:
>>
>>  - qcom,wsi-group-id: It represents the identifier assigned to the WSI
>>    connection. All the ath12k devices connected to same WSI connection
>>    have the same wsi-group-id.
>>
>>  - qcom,wsi-master: Indicates if this device is the WSI master.
>>
>>  - ports: This is a graph ports schema that has two ports: TX (port@0)
>>    and RX (port@1). This represents the actual WSI connection among
>>    multiple devices.
>>
>> Also, describe the ath12k device property
>> "qcom,ath12k-calibration-variant". This is a common property among
>> ath12k devices.
>>
>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@xxxxxxxxxxx>
>> ---
>>  .../bindings/net/wireless/qcom,ath12k.yaml    | 241 +++++++++++++++++-
>>  1 file changed, 232 insertions(+), 9 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml
>> index 1b5884015b15..42bcd73dd159 100644
>> --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml
>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml
>> @@ -1,5 +1,6 @@
>>  # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>  # Copyright (c) 2024 Linaro Limited
>> +# Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>>  %YAML 1.2
>>  ---
>>  $id: http://devicetree.org/schemas/net/wireless/qcom,ath12k.yaml#
>> @@ -18,10 +19,17 @@ properties:
>>    compatible:
>>      enum:
>>        - pci17cb,1107  # WCN7850
>> +      - pci17cb,1109  # QCN9274
>>  
>>    reg:
>>      maxItems: 1
>>  
>> +  qcom,ath12k-calibration-variant:
>> +    $ref: /schemas/types.yaml#/definitions/string
>> +    description: |
>> +      string to uniquely identify variant of the calibration data for designs
>> +      with colliding bus and device ids
>> +
>>    vddaon-supply:
>>      description: VDD_AON supply regulator handle
>>  
>> @@ -49,21 +57,100 @@ properties:
>>    vddpcie1p8-supply:
>>      description: VDD_PCIE_1P8 supply regulator handle
>>  
>> +  wsi:
>> +    type: object
>> +    description: |
>> +      The ath12k devices (QCN9274) feature WSI support. WSI stands for
>> +      WLAN Serial Interface. It is used for the exchange of specific
>> +      control information across radios based on the doorbell mechanism.
>> +      This WSI connection is essential to exchange control information
>> +      among these devices.
>> +
>> +      Diagram to represent one WSI connection (one WSI group) among
>> +      three devices.
>> +
>> +               +-------+        +-------+        +-------+
>> +               | pcie2 |        | pcie3 |        | pcie1 |
> is there a reason to not have these in some order?
> 

This could be made in same order. In next version will update.
But in actual hardware the pcie and wsi connection may not be same order.

>> +               |       |        |       |        |       |
>> +        +----->|  wsi  |------->|  wsi  |------->|  wsi  |-----+
>> +        |      | grp 0 |        | grp 0 |        | grp 2 |     |
> s/grp 2/grp 0/???                                          ^ typo?
> 

Thanks for pointing out, this is a typo. will update in next version.
>> +        |      +-------+        +-------+        +-------+     |
>> +        +------------------------------------------------------+
>> +
>> +      Diagram to represent two WSI connections (two separate WSI groups)
>> +      among four devices.
>> +
>> +           +-------+    +-------+          +-------+    +-------+
>> +           | pcie2 |    | pcie3 |          | pcie1 |    | pcie0 |
> again seems strange to not have any logical (to me) order

Will keep this example diagram in pcie order in next version.




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