On 22.10.2024 1:21 AM, Melody Olvera wrote:
> Add base dtsi for the sm8750 SoC describing the CPUs, GCC and
> RPMHCC clock controllers, geni UART, interrupt controller, TLMM,
> reserved memory, interconnects, regulator, and SMMU nodes. Also add
> MTP and QRD board dts files for sm8750.
>
> Co-developed-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
> Signed-off-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
> Co-developed-by: Jishnu Prakash <quic_jprakash@xxxxxxxxxxx>
> Signed-off-by: Jishnu Prakash <quic_jprakash@xxxxxxxxxxx>
> Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx>
> Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx>
> ---
[...]
> +&spmi_bus {
> + pm8550ve_d: pmic@3 {
These usually go to a separate file each.. But I see why that would
be difficult here.
Lately I've been a fan of <socname>-pmics.dtsi. WDYT, Bjorn?
[...]
> + apps_smmu: iommu@15000000 {
> + compatible = "qcom,sm8750-smmu-500", "qcom,smmu-500", "arm,mmu-500";
> + reg = <0x0 0x15000000 0x0 0x100000>;
> +
[...]
> + #iommu-cells = <2>;
> + #global-interrupts = <1>;
This is usually dma-coherent, you can determine that through a smoke
test
> + };
> +
> + intc: interrupt-controller@16000000 {
> + compatible = "arm,gic-v3";
> + reg = <0x0 0x16000000 0x0 0x10000>, /* GICD */
> + <0x0 0x16080000 0x0 0x200000>; /* GICR * 12 */
These comments are copypasted gen to gen and don't bring much
information atop what's in bindings
Konrad
