On 10/25/24 2:14 PM, Peter Griffin wrote: > Now that exynos_ufs_specify_phy_time_attr() checks the appropriate > EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR flag. Remove the unused fields > in gs101_uic_attr. > > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> Reviewed-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxx> > --- > drivers/ufs/host/ufs-exynos.c | 20 -------------------- > 1 file changed, 20 deletions(-) > > diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c > index a1a2fdcb8a40..9d668d13fe94 100644 > --- a/drivers/ufs/host/ufs-exynos.c > +++ b/drivers/ufs/host/ufs-exynos.c > @@ -2068,26 +2068,6 @@ static const struct exynos_ufs_drv_data exynos_ufs_drvs = { > > static struct exynos_ufs_uic_attr gs101_uic_attr = { > .tx_trailingclks = 0xff, > - .tx_dif_p_nsec = 3000000, /* unit: ns */ > - .tx_dif_n_nsec = 1000000, /* unit: ns */ > - .tx_high_z_cnt_nsec = 20000, /* unit: ns */ > - .tx_base_unit_nsec = 100000, /* unit: ns */ > - .tx_gran_unit_nsec = 4000, /* unit: ns */ > - .tx_sleep_cnt = 1000, /* unit: ns */ Okay with the removal of the above. All are set in exynos_ufs_specify_phy_time_attr(), which returns early if EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR is set. > - .tx_min_activatetime = 0xa, > - .rx_filler_enable = 0x2, Okay with these. They are used just in exynos_ufs_config_phy_time_attr which is guarded by EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR. > - .rx_dif_p_nsec = 1000000, /* unit: ns */ > - .rx_hibern8_wait_nsec = 4000000, /* unit: ns */ > - .rx_base_unit_nsec = 100000, /* unit: ns */ > - .rx_gran_unit_nsec = 4000, /* unit: ns */ > - .rx_sleep_cnt = 1280, /* unit: ns */ > - .rx_stall_cnt = 320, /* unit: ns */ Okay with the removal of the above. All are set in exynos_ufs_specify_phy_time_attr(), which returns early if EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR is set. > - .rx_hs_g1_sync_len_cap = SYNC_LEN_COARSE(0xf), > - .rx_hs_g2_sync_len_cap = SYNC_LEN_COARSE(0xf), > - .rx_hs_g3_sync_len_cap = SYNC_LEN_COARSE(0xf), > - .rx_hs_g1_prep_sync_len_cap = PREP_LEN(0xf), > - .rx_hs_g2_prep_sync_len_cap = PREP_LEN(0xf), > - .rx_hs_g3_prep_sync_len_cap = PREP_LEN(0xf), Okay for these as well, all are set in exynos_ufs_config_phy_cap_attr() which is guarded by EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR. > .pa_dbg_opt_suite1_val = 0x90913C1C, > .pa_dbg_opt_suite1_off = PA_GS101_DBG_OPTION_SUITE1, > .pa_dbg_opt_suite2_val = 0xE01C115F,