On Tue, Mar 31, 2015 at 7:00 AM, Ralf Baechle <ralf@xxxxxxxxxxxxxx> wrote: > On Mon, Mar 30, 2015 at 04:16:53PM -0700, Andrew Bresticker wrote: > >> This series adds support for the system pin and GPIO controller on the IMG >> Pistachio SoC. Pistachio's system pin controller manages 99 pins, 90 of >> which are MFIOs which can be muxed between multiple functions or used >> as GPIOs. The GPIO control for the 90 MFIOs is broken up into banks >> of 16. Pistachio also has a second pin controller, the RPU pin controller, >> which will be supported by a future patchset through an extension to this >> driver. >> >> Test on an IMG Pistachio BuB. Based on mips-for-linux-next which inluces my >> series adding Pistachio platform support [1]. A branch with this series is >> available at [2]. > > Does this mean you want me to funnel this through the MIPS tree? If so, > could I have an Ack from the maintainers? Linus mentioned in v1 that if the only dependency was a Kconfig symbol that he could take it through his tree. I'm fine either way, though it would be slightly more convenient for it to go through the MIPS tree. Linus? Thanks, Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
