Add support for LLCC programming on Qualcomm SAR2130P and SAR1130P platforms. These platforms require few additional quirks in order to be handled properly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- Changes in v3: - Use decimal numbers for bit shift values (instead of hex) (Konrad) - Link to v2: https://lore.kernel.org/r/20241025-sar2130p-llcc-v2-0-7455dc40e952@xxxxxxxxxx Changes in v2: - Added max_cap_shift and num_banks to struct qcom_llcc_config (Konrad) - Link to v1: https://lore.kernel.org/r/20241019-sar2130p-llcc-v1-0-4e09063d04f2@xxxxxxxxxx --- Dmitry Baryshkov (3): dt-bindings: cache: qcom,llcc: document SAR2130P and SAR1130P soc: qcom: llcc: use deciman integers for bit shift values soc: qcom: llcc: add support for SAR2130P and SAR1130P .../devicetree/bindings/cache/qcom,llcc.yaml | 28 ++ drivers/soc/qcom/llcc-qcom.c | 472 ++++++++++++++++++++- include/linux/soc/qcom/llcc-qcom.h | 12 + 3 files changed, 500 insertions(+), 12 deletions(-) --- base-commit: f2493655d2d3d5c6958ed996b043c821c23ae8d3 change-id: 20241017-sar2130p-llcc-0c2616777cde Best regards, -- Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
