Hi, Krzysztof,
Since the changes are minor compared to v4, I have kept your signature.
If you find any problem, please let me know.
Thanks,
Chen
On 2024/10/25 16:07, Chen Wang wrote:
From: Chen Wang <unicorn_wang@xxxxxxxxxxx>
Sophgo SG2042 contains a PWM controller, which has 4 channels and
can generate PWM waveforms output.
Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
.../bindings/pwm/sophgo,sg2042-pwm.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml
diff --git a/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml b/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml
new file mode 100644
index 000000000000..5dea41fa4c44
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 PWM controller
+
+maintainers:
+ - Chen Wang <unicorn_wang@xxxxxxxxxxx>
+
+description:
+ This controller contains 4 channels which can generate PWM waveforms.
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ const: sophgo,sg2042-pwm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb
+
+ resets:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/reset/sophgo,sg2042-reset.h>
+
+ pwm@7f006000 {
+ compatible = "sophgo,sg2042-pwm";
+ reg = <0x7f006000 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&clock 67>;
+ clock-names = "apb";
+ resets = <&rstgen RST_PWM>;
+ };