On Thu, Oct 24, 2024 at 03:15:47PM +0800, Billy Tsai wrote:
> Add an option to support #pwm-cells up to 4. The additional cell is used
> to enable the WDT reset feature, which is specific to the ASPEED PWM
> controller.
Use subject prefixes matching the subsystem.
>
> Signed-off-by: Billy Tsai <billy_tsai@xxxxxxxxxxxxxx>
> Change-Id: Iefcc9622ac3dc684441d3e77aeb53c00f2ce4097
Drop.
> ---
> .../bindings/hwmon/aspeed,g6-pwm-tach.yaml | 25 ++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
> index 9e5ed901ae54..0cc92ce29ece 100644
> --- a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
> +++ b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml
> @@ -31,7 +31,11 @@ properties:
> maxItems: 1
>
> "#pwm-cells":
> - const: 3
> + enum: [3, 4]
> + description: |
> + The value should be 4 to enable the WDT reload feature, which will change the duty cycle to
> + a preprogrammed value after WDT/EXTRST#.
> + The range for the fourth cell value supported by this binding is 0 to 255.
Wrap lines at 80.
>
> patternProperties:
> "^fan-[0-9]+$":
> @@ -69,3 +73,22 @@ examples:
> pwms = <&pwm_tach 1 40000 0>;
> };
> };
> + - |
> + #include <dt-bindings/clock/aspeed-clock.h>
> + pwm_tach: pwm-tach-controller@1e610000 {
> + compatible = "aspeed,ast2600-pwm-tach";
> + reg = <0x1e610000 0x100>;
> + clocks = <&syscon ASPEED_CLK_AHB>;
> + resets = <&syscon ASPEED_RESET_PWM>;
> + #pwm-cells = <4>;
> +
> + fan-0 {
> + tach-ch = /bits/ 8 <0x0>;
> + pwms = <&pwm_tach 0 40000 0 128>;
> + };
> +
> + fan-1 {
> + tach-ch = /bits/ 8 <0x1 0x2>;
> + pwms = <&pwm_tach 1 40000 0 160>;
> + };
> + };
> --
> 2.25.1
>
