On Thu, Oct 24, 2024 at 02:21:02PM +0800, Inochi Amaoto wrote: > The UART of SG2044 is modified version of the standard Synopsys > DesignWare UART. The UART on SG2044 relys on the internal divisor > and can not set right clock rate for the common bitrates. > > Add compatibles string for the Sophgo SG2044 uarts. > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx> > --- > Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 + > 1 file changed, 1 insertion(+) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
