On Wed, Oct 23, 2024 at 07:08:57PM +0200, Andrew Lunn wrote:
> > + airoha,base_smi_address:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + Configure and change the base switch PHY address to a new address on
> > + the bus.
> > + On reset, the switch PHY address is ALWAYS 1.
> > + default: 1
> > + maximum: 31
>
> Given that this is a 5 port switch, what happens if i pick a value
> greater than 31 - 5 ?
The PHY at those address won't be reachable, I didn't think of this, you
are right.
>
> Do you have a real use case for this? A board which requires the PHYs
> get shifted from the default of 1? Vendors have all sorts of bells and
> whistles which we never use. If its not needed, i would not add it,
> until it is actually needed, if ever.
Well the first case that comes to mind is multiple switch and conflict.
I have no idea if there are hw strap to configure this so I assume if a
SoC have 2 switch (maybe of the same type), this permits to configure
them (with reset pin and deasserting them once the base address is
correctly configured)
But yes totally ok to drop this if too strange... I assume it's problematic
that PHY change at runtime.
>
> > + mdio:
> > + $ref: /schemas/net/mdio.yaml#
> > + unevaluatedProperties: false
> > + description:
> > + Define the relative address of the internal PHY for each port.
> > +
> > + Each reg for the PHY is relative to the switch base PHY address.
>
> Which is not the usual meaning of reg.
>
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + internal_phy0: phy@0 {
> > + reg = <0>;
>
> So given that airoha,base_smi_address defaults to 1, this is actually
> address 1 on the MDIO bus?
>
Yes correct. One problem I had was that moving this outside the swich
cause panic as it does conflict with the switch PHY address...
--
Ansuel
