> -----Original Message----- > From: Frank Li <frank.li@xxxxxxx> > Sent: 2024年10月23日 0:18 > To: Wei Fang <wei.fang@xxxxxxx> > Cc: davem@xxxxxxxxxxxxx; edumazet@xxxxxxxxxx; kuba@xxxxxxxxxx; > pabeni@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; > conor+dt@xxxxxxxxxx; Vladimir Oltean <vladimir.oltean@xxxxxxx>; Claudiu > Manoil <claudiu.manoil@xxxxxxx>; Clark Wang <xiaoning.wang@xxxxxxx>; > christophe.leroy@xxxxxxxxxx; linux@xxxxxxxxxxxxxxx; bhelgaas@xxxxxxxxxx; > horms@xxxxxxxxxx; imx@xxxxxxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > linux-pci@xxxxxxxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx > Subject: Re: [PATCH v4 net-next 03/13] dt-bindings: net: add bindings for NETC > blocks control > > On Tue, Oct 22, 2024 at 01:52:13PM +0800, Wei Fang wrote: > > Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks > > of 64KB registers, integrated endpoint register block (IERB) and > > privileged register block (PRB). IERB is used for pre-boot > > initialization for all NETC devices, such as ENETC, Timer, EMDIO and > > so on. And PRB controls global reset and global error handling for > > NETC. Moreover, for the i.MX platform, there is also a NETCMIX block > > for link configuration, such as MII protocol, PCS protocol, etc. > > > > Signed-off-by: Wei Fang <wei.fang@xxxxxxx> > > --- > > v2 changes: > > 1. Rephrase the commit message. > > 2. Change unevaluatedProperties to additionalProperties. > > 3. Remove the useless lables from examples. > > v3 changes: > > 1. Remove the items from clocks and clock-names, add maxItems to > > clocks and rename the clock. > > v4 changes: > > 1. Reorder the required properties. > > 2. Add assigned-clocks, assigned-clock-parents and assigned-clock-rates. > > --- > > .../bindings/net/nxp,netc-blk-ctrl.yaml | 111 ++++++++++++++++++ > > 1 file changed, 111 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml > > b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml > > new file mode 100644 > > index 000000000000..0b7fd2c5e0d8 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml > > @@ -0,0 +1,111 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: NETC Blocks Control > > + > > +description: > > + Usually, NETC has 2 blocks of 64KB registers, integrated endpoint > > +register > > + block (IERB) and privileged register block (PRB). IERB is used for > > +pre-boot > > + initialization for all NETC devices, such as ENETC, Timer, EMIDO and so on. > > + And PRB controls global reset and global error handling for NETC. > > +Moreover, > > + for the i.MX platform, there is also a NETCMIX block for link > > +configuration, > > + such as MII protocol, PCS protocol, etc. > > + > > +maintainers: > > + - Wei Fang <wei.fang@xxxxxxx> > > + - Clark Wang <xiaoning.wang@xxxxxxx> > > + > > +properties: > > + compatible: > > + enum: > > + - nxp,imx95-netc-blk-ctrl > > + > > + reg: > > + minItems: 2 > > + maxItems: 3 > > + > > + reg-names: > > + minItems: 2 > > + items: > > + - const: ierb > > + - const: prb > > + - const: netcmix > > + > > + "#address-cells": > > + const: 2 > > + > > + "#size-cells": > > + const: 2 > > + > > + ranges: true > > + assigned-clocks: true > > + assigned-clock-parents: true > > + assigned-clock-rates: true > > I am not sure if it necessary. But if add restriction, it should be > > assigned-clocks: > maxItems: 2 > There is no need to add restrictions here, different SoCs have different clocks that need to be configured. For example, the upcoming SoC has more clocks to be configured. > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + const: ipg > > + > > + power-domains: > > + maxItems: 1 > > + > > +patternProperties: > > + "^pcie@[0-9a-f]+$": > > + $ref: /schemas/pci/host-generic-pci.yaml# > > + > > +required: > > + - compatible > > + - reg > > + - reg-names > > + - "#address-cells" > > + - "#size-cells" > > + - ranges > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + bus { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + netc-blk-ctrl@4cde0000 { > > + compatible = "nxp,imx95-netc-blk-ctrl"; > > + reg = <0x0 0x4cde0000 0x0 0x10000>, > > + <0x0 0x4cdf0000 0x0 0x10000>, > > + <0x0 0x4c81000c 0x0 0x18>; > > + reg-names = "ierb", "prb", "netcmix"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + assigned-clocks = <&scmi_clk 98>, <&scmi_clk 102>; > > + assigned-clock-parents = <&scmi_clk 12>, <&scmi_clk 6>; > > + assigned-clock-rates = <666666666>, <250000000>; > > + clocks = <&scmi_clk 98>; > > + clock-names = "ipg"; > > + power-domains = <&scmi_devpd 18>; > > + > > + pcie@4cb00000 { > > + compatible = "pci-host-ecam-generic"; > > + reg = <0x0 0x4cb00000 0x0 0x100000>; > > + #address-cells = <3>; > > + #size-cells = <2>; > > + device_type = "pci"; > > + bus-range = <0x1 0x1>; > > + ranges = <0x82000000 0x0 0x4cce0000 0x0 > 0x4cce0000 0x0 0x20000 > > + 0xc2000000 0x0 0x4cd10000 0x0 > 0x4cd10000 > > + 0x0 0x10000>; > > + > > + mdio@0,0 { > > + compatible = "pci1131,ee00"; > > + reg = <0x010000 0 0 0 0>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + }; > > + }; > > + }; > > -- > > 2.34.1 > >
