On Tue, Oct 22, 2024 at 12:46:40PM -0500, David Lechner wrote: > Convert the AXI DMAC bindings from .txt to .yaml. > > Signed-off-by: David Lechner <dlechner@xxxxxxxxxxxx> > --- > > For the maintainer, Lars is the original author, but isn't really > active with ADI anymore, so I have added Nuno instead since he is the > most active ADI representative currently and is knowledgeable about this > hardware. > > Also, the rob-bot is likely to complain. Locally, I am getting the > following warning from dt_bindings_check: > > Documentation/devicetree/bindings/dma/adi,axi-dmac.yaml: properties:adi,channels:type: 'boolean' was expected > hint: A vendor boolean property can use "type: boolean" > from schema $id: http://devicetree.org/meta-schemas/vendor-props.yaml# > DTC [C] Documentation/devicetree/bindings/dma/adi,axi-dmac.example.dtb > > I think this is telling me that object nodes should not have a vendor > prefix. However, since this is an existing bindings, we can't change > that. Yes, that can be ignored. I'll have to drop that check from dtschema. > --- > .../devicetree/bindings/dma/adi,axi-dmac.txt | 61 --------- > .../devicetree/bindings/dma/adi,axi-dmac.yaml | 137 +++++++++++++++++++++ > 2 files changed, 137 insertions(+), 61 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt b/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt > deleted file mode 100644 > index cd17684aaab5..000000000000 > --- a/Documentation/devicetree/bindings/dma/adi,axi-dmac.txt > +++ /dev/null > @@ -1,61 +0,0 @@ > -Analog Devices AXI-DMAC DMA controller > - > -Required properties: > - - compatible: Must be "adi,axi-dmac-1.00.a". > - - reg: Specification for the controllers memory mapped register map. > - - interrupts: Specification for the controllers interrupt. > - - clocks: Phandle and specifier to the controllers AXI interface clock > - - #dma-cells: Must be 1. > - > -Required sub-nodes: > - - adi,channels: This sub-node must contain a sub-node for each DMA channel. For > - the channel sub-nodes the following bindings apply. They must match the > - configuration options of the peripheral as it was instantiated. > - > -Required properties for adi,channels sub-node: > - - #size-cells: Must be 0 > - - #address-cells: Must be 1 > - > -Required channel sub-node properties: > - - reg: Which channel this node refers to. > - - adi,source-bus-width, > - adi,destination-bus-width: Width of the source or destination bus in bits. > - - adi,source-bus-type, > - adi,destination-bus-type: Type of the source or destination bus. Must be one > - of the following: > - 0 (AXI_DMAC_TYPE_AXI_MM): Memory mapped AXI interface > - 1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface > - 2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface > - > -Deprecated optional channel properties: > - - adi,length-width: Width of the DMA transfer length register. > - - adi,cyclic: Must be set if the channel supports hardware cyclic DMA > - transfers. > - - adi,2d: Must be set if the channel supports hardware 2D DMA transfers. > - > -DMA clients connected to the AXI-DMAC DMA controller must use the format > -described in the dma.txt file using a one-cell specifier. The value of the > -specifier refers to the DMA channel index. > - > -Example: > - > -dma: dma@7c420000 { > - compatible = "adi,axi-dmac-1.00.a"; > - reg = <0x7c420000 0x10000>; > - interrupts = <0 57 0>; > - clocks = <&clkc 16>; > - #dma-cells = <1>; > - > - adi,channels { > - #size-cells = <0>; > - #address-cells = <1>; > - > - dma-channel@0 { > - reg = <0>; > - adi,source-bus-width = <32>; > - adi,source-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>; > - adi,destination-bus-width = <64>; > - adi,destination-bus-type = <ADI_AXI_DMAC_TYPE_FIFO>; > - }; > - }; > -}; > diff --git a/Documentation/devicetree/bindings/dma/adi,axi-dmac.yaml b/Documentation/devicetree/bindings/dma/adi,axi-dmac.yaml > new file mode 100644 > index 000000000000..e457630ec7c0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/adi,axi-dmac.yaml > @@ -0,0 +1,137 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/adi,axi-dmac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Analog Devices AXI-DMAC DMA controller > + > +description: http://analogdevicesinc.github.io/hdl/library/axi_dmac/index.html Please make description more than just a link. > + > +maintainers: > + - Nuno Sa <nuno.sa@xxxxxxxxxx> > + > +properties: > + compatible: > + const: adi,axi-dmac-1.00.a > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + "#dma-cells": > + const: 1 > + > + adi,channels: > + type: object > + description: This sub-node must contain a sub-node for each DMA channel. > + > + properties: > + "#size-cells": > + const: 0 > + "#address-cells": > + const: 1 > + > + patternProperties: > + "^dma-channel@[0-9a-f]+$": > + type: object > + description: > + DMA channel properties based on HDL compile-time configuration. > + > + properties: > + reg: > + maxItems: 1 > + > + adi,source-bus-width: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Width of the source bus in bits. > + enum: [8, 16, 32, 64, 128] > + > + adi,destination-bus-width: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Width of the destination bus in bits. > + enum: [8, 16, 32, 64, 128] > + > + # 0 (AXI_DMAC_TYPE_AXI_MM): Memory mapped AXI interface > + # 1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface > + # 2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface Put these in the 'description' > + > + adi,source-bus-type: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Type of the source bus. > + enum: [0, 1, 2] > + > + adi,destination-bus-type: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Type of the destination bus. > + enum: [0, 1, 2] > + > + adi,length-width: > + deprecated: true > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Width of the DMA transfer length register. > + > + adi,cyclic: > + deprecated: true > + type: boolean > + description: > + Must be set if the channel supports hardware cyclic DMA transfers. > + > + adi,2d: > + deprecated: true > + type: boolean > + description: > + Must be set if the channel supports hardware 2D DMA transfers. > + > + required: > + - reg > + - adi,source-bus-width > + - adi,destination-bus-width > + - adi,source-bus-type > + - adi,destination-bus-type > + > + additionalProperties: false Put this before 'properties'. Easier to read the indented cases that way. > + > + required: > + - "#size-cells" > + - "#address-cells" > + > + additionalProperties: false ditto > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - "#dma-cells" > + - adi,channels > + > +additionalProperties: false > + > +examples: > + - | > + dma: dma@7c420000 { Drop unused labels. dma-controller@7c420000 > + compatible = "adi,axi-dmac-1.00.a"; > + reg = <0x7c420000 0x10000>; > + interrupts = <0 57 0>; > + clocks = <&clkc 16>; > + #dma-cells = <1>; > + > + adi,channels { > + #size-cells = <0>; > + #address-cells = <1>; > + > + dma-channel@0 { > + reg = <0>; > + adi,source-bus-width = <32>; > + adi,source-bus-type = <0>; /* AXI_DMAC_TYPE_AXI_MM */ > + adi,destination-bus-width = <64>; > + adi,destination-bus-type = <2>; /* AXI_DMAC_TYPE_AXI_FIFO */ > + }; > + }; > + }; > > -- > 2.43.0 >
