Re: [PATCH v7 2/2] mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoC

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Dear Miquel,

Thank you for your reply.


On 2024/10/22 下午 04:51, Miquel Raynal wrote:
Hi Hui-Ping,

+
+static int ma35_nand_write_page_hwecc(struct nand_chip *chip, const u8 *buf,
+				      int oob_required, int page)
+{
The hardware ECC engine should always be disabled by default.

Then, in these helpers you should:
* enable the ECC engine
* do your things
* disable the ECC engine
The ECC engine of the MA35 NAND controller cannot be turned on or off separately.

The ECC engine is activated with the DMA,

and it calculates and writes to the OOB during the transfer.
What about:

ECC Algorithm Enable Bit [23] ECCEN

	This field is used to select the ECC algorithm for data
	protecting. The BCH algorithm can correct 8 or 12 or 24 bits.
	0 = BCH code encode/decode Disabled.
	1 = BCH code encode/decode Enabled.

?

That's right, this bit represents this meaning, but ECC operations will only occur when DMA is activated.

I will add enable/disable ECC engine before and after reading/writing the page.


Thanks,
Miquèl


Best regards,

Hui-Ping Chen






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