On Mon, 09 Sep 2024 17:14:40 +0200, Daniel Machon wrote:
> The lan969x switch chip (upstreaming efforts beginning soon) has ten 10G
> SERDES'es which share the same features and data rates as the Sparx5 10G
> SERDES'es. Lets take advantage of this and reuse the existing SERDES
> driver for lan969x.
>
> In order to do this, we add a new indirection layer to the register
> macros, that takes register differences into account. Additionally, we
> add driver match data for other differences that we need to handle.
> These other differences are handled by a combination of constants (eg.
> the number of SERDES'es), ops and if's
>
> [...]
Applied, thanks!
[1/9] phy: sparx5-serdes: add support for private match data
commit: d41bb5e00ec7ac2905ab115ed4bbf971aa593704
[2/9] phy: sparx5-serdes: add constants to match data
commit: 8e65baf8ccc1fdc72645db15a10bd69209cccfb8
[3/9] phy: sparx5-serdes: add constant for the number of CMU's
commit: 5206ba966d0b053bcd15e4fcba17284201ca6199
[4/9] phy: sparx5-serdes: add ops to match data
commit: d61d42a91e322f73b8c68e22347469306b280008
[5/9] phy: sparx5-serdes: add function for getting the CMU index
commit: f16df057837e06d16b5e5f978d79d80d70784b80
[6/9] phy: sparx5-serdes: add indirection layer to register macros
commit: c8e4c8b7ea47cb9044c190e6148e994c8e04a34a
[7/9] phy: sparx5-serdes: add support for branching on chip type
commit: 6158a32b431bc93f35aff03c9889417a7643da9a
[8/9] dt-bindings: phy: sparx5: document lan969x
commit: c5699055472ead216c38236476c62bf43fcc3ca3
[9/9] phy: lan969x-serdes: add support for lan969x serdes driver
commit: c0a0a7aec1b142e116c61f3d3facc8c80e97bbff
Best regards,
--
~Vinod
