On Mon, 21 Oct 2024 16:53:28 +0300, Abel Vesa wrote:
> The PCIe 6a PHY is actually Gen4 4-lanes capable. So the gen4x4 compatible
> describes it. But according to the schema, currently the gen4x4 compatible
> doesn't require both PHY and PHY-nocsr resets, while the HW does. So fix
> that by adding the gen4x4 compatible alongside the gen4x2 one for the
> resets description.
>
>
> [...]
Applied, thanks!
[1/1] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix X1E80100 resets entries
commit: 16fde3e076775d3b51f48d44d050746fbc9d638e
Best regards,
--
~Vinod
