On Mon, Oct 21, 2024 at 01:10:52PM +0100, Conor Dooley wrote: > On Mon, Oct 21, 2024 at 03:26:05PM +0800, Inochi Amaoto wrote: > > The UART of SG2044 is modified version of the standard Synopsys > > DesignWare UART. The UART on SG2044 relys on the internal divisor > > and can not set right clock rate for the common bitrates. > > > > Add compatibles string for the Sophgo SG2044 uarts. > > > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx> > > --- > > .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml > > index 4cdb0dcaccf3..6963f89a1848 100644 > > --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml > > +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml > > @@ -58,6 +58,10 @@ properties: > > - brcm,bcm11351-dw-apb-uart > > - brcm,bcm21664-dw-apb-uart > > - const: snps,dw-apb-uart > > + - items: > > + - enum: > > + - sophgo,sg2044-uart > > + - const: snps,dw-apb-uart > > Why does each vendor have an items entry of its own? Seems like needless > clutter of the file IMO, except for the renesas bit. > > > Cheers, > Conor. I just follow others when writing this binding. I think it may need another patch to fix this problem, right? Regards, Inochi
