On Sun, 20 Oct 2024 19:58:21 +1300 "Ryan Walklin" <ryan@xxxxxxxxxxxxx> wrote: Hi, > On Mon, 30 Sep 2024, at 8:56 AM, Krzysztof Kozlowski wrote: > > On Sun, Sep 29, 2024 at 11:06:05PM +1300, Ryan Walklin wrote: > > >> > >> clocks: > >> - items: > >> - - description: Bus Clock > >> - - description: Module Clock > >> + oneOf: > >> + - items: > >> + - description: Bus Clock > >> + - description: Module Clock > >> + - items: > >> + - description: Bus Clock > >> + - description: Module Clock > >> + - description: Module Clock (4X) > > > > No, grow the list and add minItems instead. > > Thanks, turns out the 4x clock is not actually required by the driver so will remove this and the clock-names change for v2. Please note that "...not required by *the* driver ..." is not a valid rationale in the context of a DT binding: it's supposed to describe the hardware, not a particular implementation. But I see that the *hardware* manual states that the codec only uses PLL_AUDIO(1X) as its input clock, so it indeed seems to be not needed. Cheers, Andre > > >> + then: > >> + properties: > >> + allwinner,audio-routing: > >> + items: > >> + enum: > >> + - LINEOUT > >> + - Line Out > > > > That's odd, why two same names? > > These are the input and output sides respectively, the LINEOUT is the SoC pinout, the Line Out is the board connector as per the routing description above. Just looks odd because the H616 codec has only this single route. > > > > > You must restrict the properties you just changed per each variant. > > > Thanks, will do . > > > Best regards, > > Krzysztof > > Regards, > > Ryan >
