Enable ethernet on the Genio 700 EVK board. It has been tested to work with speeds up to 1000Mbps. Signed-off-by: Jianguo Zhang <jianguo.zhang@xxxxxxxxxxxx> Signed-off-by: Macpaul Lin <macpaul.lin@xxxxxxxxxxxx> Signed-off-by: Hsuan-Yu Lin <shane.lin@xxxxxxxxxxxxx> Signed-off-by: Pablo Sun <pablo.sun@xxxxxxxxxxxx> Signed-off-by: fanyi zhang <fanyi.zhang@xxxxxxxxxxxx> [Cleaned up to pass dtbs_check, follow DTS style guidelines, and split between mt8188 and genio700 commits, and addressed further feedback from the mailing list] Signed-off-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx> --- .../arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts index 0a6c9871b41e5f913740e68853aea78bc33d02aa..a063c7504cce08707a308b72559f2425eee515e1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts @@ -24,6 +24,7 @@ / { aliases { serial0 = &uart0; + ethernet0 = ð }; chosen { @@ -845,6 +846,25 @@ pins-wifi-enable { }; }; +ð { + phy-mode ="rgmii-id"; + phy-handle = <ðernet_phy0>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + mediatek,mac-wol; + snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us = <0 10000 10000>; + status = "okay"; +}; + +ð_mdio { + ethernet_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + }; +}; + &pmic { interrupt-parent = <&pio>; interrupts = <222 IRQ_TYPE_LEVEL_HIGH>; -- 2.47.0