On Fri, Oct 18, 2024 at 08:49:09AM +0200, Krzysztof Kozlowski wrote: > On Thu, Oct 17, 2024 at 07:15:45PM +0300, Dmitry Baryshkov wrote: > > Add bindings for the pin controller (TLMM) present on the > > Qualcomm SAR2130P platform. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > --- > > .../bindings/pinctrl/qcom,sar2130p-tlmm.yaml | 138 +++++++++++++++++++++ > > 1 file changed, 138 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sar2130p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sar2130p-tlmm.yaml > > new file mode 100644 > > index 0000000000000000000000000000000000000000..a8daa96936599e459c801b6685a42659271604ee > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sar2130p-tlmm.yaml > > @@ -0,0 +1,138 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pinctrl/qcom,sar2130p-tlmm.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Technologies, Inc. SAR2130P TLMM block > > + > > +maintainers: > > + - Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > + > > +description: > > + Top Level Mode Multiplexer pin controller in Qualcomm SAR2130P SoC. > > + > > +allOf: > > + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# > > + > > +properties: > > + compatible: > > + const: qcom,sar2130p-tlmm > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + gpio-reserved-ranges: > > + minItems: 1 > > + maxItems: 105 > > + > > + gpio-line-names: > > + maxItems: 156 > > Don't you have 210 GPIOs? At least reserved-ranges and pins pattern > suggest it. No. I will fix the pins pattern. > > Best regards, > Krzysztof > -- With best wishes Dmitry
