On Fri, Sep 27, 2024 at 04:14:42PM +0200, iansdannapel@xxxxxxxxx wrote: > From: Ian Dannapel <iansdannapel@xxxxxxxxx> > > Add a new driver for loading binary firmware to volatile > configuration RAM using "SPI passive programming" on Efinix FPGAs. > > Signed-off-by: Ian Dannapel <iansdannapel@xxxxxxxxx> > --- > drivers/fpga/Kconfig | 10 ++ > drivers/fpga/Makefile | 1 + > drivers/fpga/efinix-trion-spi-passive.c | 211 ++++++++++++++++++++++++ > 3 files changed, 222 insertions(+) > create mode 100644 drivers/fpga/efinix-trion-spi-passive.c > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index 37b35f58f0df..eb1e44c4e3e0 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -83,6 +83,16 @@ config FPGA_MGR_XILINX_SPI > FPGA manager driver support for Xilinx FPGA configuration > over slave serial interface. > > +config FPGA_MGR_EFINIX_SPI > + tristate "Efinix FPGA configuration over SPI passive" > + depends on SPI > + help > + This option enables support for the FPGA manager driver to > + configure Efinix Trion and Titanium Series FPGAs over SPI > + using passive serial mode. > + Warning: Do not activate this if there are other SPI devices > + on the same bus as it might interfere with the transmission. Sorry, this won't work. As you can see, the conflict usage of CS causes several concerns. Just a text here is far from enough. You need to actively work with SPI core/controller drivers to find a solution that coordinate the usage of this pin. Thanks Yilun
