Re: [PATCH] dt-bindings: pinctrl: fsl, imx6ul-pinctrl: Convert i.MX35/5x/6 to YAML

[Marek Vasut <marex@xxxxxxx>]

On 10/16/24 8:58 AM, Alexander Stein wrote:
> Hi Marek,

Hi,

> thanks for the conversion.

Sure

[...]

> > @@ -19,6 +19,15 @@ allOf:
> >   properties:
> >     compatible:
> >       enum:
> > +      - fsl,imx35-iomuxc
> > +      - fsl,imx50-iomuxc
> > +      - fsl,imx51-iomuxc
> > +      - fsl,imx53-iomuxc
>
> imx50.dtsi is using
> > "fsl,imx50-iomuxc", "fsl,imx53-iomuxc";
>
> So either the .dtsi or this schema needs to be adjusted.

I'll be special-casing this in V2, thanks.

> > +      - fsl,imx6dl-iomuxc
> > +      - fsl,imx6q-iomuxc
> > +      - fsl,imx6sl-iomuxc
> > +      - fsl,imx6sll-iomuxc
> > +      - fsl,imx6sx-iomuxc
> >         - fsl,imx6ul-iomuxc
> >         - fsl,imx6ull-iomuxc-snvs
> >   

[...]

> > +                Common i.MX6 bits
> >                     PAD_CTL_HYS                     (1 << 16)
> >                     PAD_CTL_PUS_100K_DOWN           (0 << 14)
> >                     PAD_CTL_PUS_47K_UP              (1 << 14)
> > @@ -69,6 +112,11 @@ patternProperties:
> >                     PAD_CTL_SPEED_MED               (1 << 6)
> >                     PAD_CTL_SPEED_HIGH              (3 << 6)
> >                     PAD_CTL_DSE_DISABLE             (0 << 3)
> > +                  PAD_CTL_SRE_FAST                (1 << 0)
> > +                  PAD_CTL_SRE_SLOW                (0 << 0)
> > +                i.MX6SL/MX6SLL specific bits
> > +                  PAD_CTL_LVE                     (1 << 22) (MX6SL/SLL only)
>
> Is this comment 'MX6SL/SLL only' really needed? This bit is already in the
> i.MX6SL/MX6SLL only section.
I think yes, because this particular bit is MX6SL/MX6SLL-only specific.