On Wed, 16 Oct 2024 10:24:09 +0800, Kevin Chen wrote: > The ASPEED AST27XX interrupt controller(INTC) contains second level and > third level interrupt controller. > > INTC0: > The second level INTC, which used to assert GIC if interrupt in INTC1 asserted. > > INTC1_x: > The third level INTC, which used to assert INTC0 if interrupt in modules > of INTC asserted. > > The relationship is like the following: > +-----+ +-------+ +---------+---module0 > | GIC |---| INTC0 |--+--| INTC1_0 |---module1 > | | | | | | |---... > +-----+ +-------+ | +---------+---module31 > | > | +---------+---module0 > +---| INTC1_1 |---module1 > | | |---... > | +---------+---module31 > ... > | +---------+---module0 > +---| INTC1_5 |---module1 > | |---... > +---------+---module31 > > Signed-off-by: Kevin Chen <kevin_chen@xxxxxxxxxxxxxx> > --- > .../aspeed,ast2700-intc.yaml | 86 +++++++++++++++++++ > 1 file changed, 86 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
