On Tue, Oct 15, 2024 at 02:14:40PM +0200, Amelie Delaunay wrote: > stm32-dma3 driver refactors the linked-list in order to address the memory > with the highest possible data width. You are still talking about driver... > It means that it can introduce up to 2 linked-list items. One with a > transfer length multiple of channel maximum burst length and so with the > highest possible data width. And an extra one with the latest bytes, with > lower data width. > Some devices (e.g. FMC ECC) don't support having several transfers instead > of only one. > So add the possibility to prevent these additional transfers, by setting > bit 17 of the 'DMA transfer requirements' bit mask. Some devices require single transfers. That's about all you need to say. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx> > --- > Changes in v2: > - Reword commit title/message/content as per Rob's suggestion. > --- > Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > index 5484848735f8ac3d2050104bbab1d986e82ba6a7..36f9fe860eb990e6caccedd31460ee6993772a35 100644 > --- a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > @@ -99,6 +99,9 @@ properties: > -bit 16: Prevent packing/unpacking mode > 0x0: pack/unpack enabled when source data width/burst != destination data width/burst > 0x1: memory data width/burst forced to peripheral data width/burst to prevent pack/unpack > + -bit 17: Prevent additional transfers due to linked-list refactoring > + 0x0: don't prevent additional transfers for optimal performance > + 0x1: prevent additional transfer to accommodate user constraints such as single transfer > > required: > - compatible > > -- > 2.25.1 >
