The I2C driver gets an interrupt upon transfer completion.
For multiple messages in a single transfer, N interrupts will be
received for N messages, leading to significant software interrupt
latency. To mitigate this latency, utilize Block Event Interrupt (BEI)
only when an interrupt is necessary. This means large transfers can be
split into multiple chunks of 64 messages internally, without expecting
interrupts for the first 63 transfers, only the last one will trigger
an interrupt indicating 64 transfers completed.
By implementing BEI, multi-message transfers can be divided into
chunks of 64 messages, improving overall transfer time.
This optimization reduces transfer time from 168 ms to 48 ms for a
series of 200 I2C write messages in a single transfer, with a
clock frequency support of 100 kHz.
BEI optimizations are currently implemented for I2C write transfers only,
as there is no use case for multiple I2C read messages in a single transfer
at this time.
Jyothi Kumar Seerapu (5):
dt-bindings: dmaengine: qcom: gpi: Add additional arg to dma-cell
property
arm64: dts: qcom: Add support for configuring channel TRE size
dmaengine: qcom: gpi: Add provision to support TRE size as the fourth
argument of dma-cells property
dmaengine: qcom: gpi: Add GPI Block event interrupt support
i2c: i2c-qcom-geni: Add Block event interrupt support
.../devicetree/bindings/dma/qcom,gpi.yaml | 6 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 132 +++++------
drivers/dma/qcom/gpi.c | 74 ++++++-
drivers/i2c/busses/i2c-qcom-geni.c | 205 ++++++++++++++++--
include/linux/dma/qcom-gpi-dma.h | 37 ++++
5 files changed, 355 insertions(+), 99 deletions(-)
base-commit: 55bcd2e0d04c1171d382badef1def1fd04ef66c5
--
2.17.1
