From: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx> Add clock definitions for NXP LINFlexD UART bindings and update the binding examples with S32G2 node. Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx> --- .../bindings/serial/fsl,s32-linflexuart.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml index 4171f524a928..7b2ba14297f9 100644 --- a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml @@ -34,10 +34,24 @@ properties: interrupts: maxItems: 1 + clocks: + items: + - description: + ipg clock drives the access to the LINFlexD + iomapped registers + - description: lin is the frequency of the baud clock + + clock-names: + items: + - const: ipg + - const: lin + required: - compatible - reg - interrupts + - clocks + - clock-names unevaluatedProperties: false @@ -48,3 +62,16 @@ examples: reg = <0x40053000 0x1000>; interrupts = <0 59 4>; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + serial@401c8000 { + compatible = "nxp,s32g2-linflexuart", + "fsl,s32v234-linflexuart"; + reg = <0x401c8000 0x3000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>; + clocks = <&clks 13>, <&clks 14>; + clock-names = "ipg", "lin"; + }; -- 2.45.2