On Fri, Oct 11, 2024 at 05:25:56PM +0900, Damien Le Moal wrote: > On 10/10/24 16:25, Manivannan Sadhasivam wrote: > > On Mon, Oct 07, 2024 at 01:12:13PM +0900, Damien Le Moal wrote: > >> Move the code in rockchip_pcie_ep_probe() to hide the MSI-X capability > >> to its own function, rockchip_pcie_ep_hide_msix_cap(). No functional > >> changes. > >> > >> Signed-off-by: Damien Le Moal <dlemoal@xxxxxxxxxx> > > > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > > > > Btw, can someone from Rockchip confirm if this hiding is necessary for all the > > SoCs? It looks to me like an SoC quirk. > > All SoCs ? Are there several versions of the RK3399 ? There seems to be some: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=296602b8e5f7 > As far as I know, there is only one. This is unlike the designware IP block used > in the RK3588 which can also be found in other SoC and may have some variations > due to different synthesis parameters. > But anyway, let's keep the quirk until we hear otherwise. - Mani > -- > Damien Le Moal > Western Digital Research -- மணிவண்ணன் சதாசிவம்
