On Thu, Oct 10, 2024 at 06:45:16PM +0100, Jonathan Cameron wrote:
> On Thu, 10 Oct 2024 14:32:49 +0000
> "Nechita, Ramona" <Ramona.Nechita@xxxxxxxxxx> wrote:
...
> > >> + /*
> > >> + * DMA (thus cache coherency maintenance) requires the
> > >> + * transfer buffers to live in their own cache lines.
> > >> + */
> > >> + struct {
> > >> + u32 chans[8];
> > >> + s64 timestamp;
> > >
> > > aligned_s64 timestamp;
> > >
> > >while it makes no difference in this case, this makes code aligned inside the IIO subsystem.
> >
> > I might be missing something but I can't find the aligned_s64 data type, should I define it myself
> > in the driver?
>
> Recent addition to the iio tree so it is in linux-next but not in mainline yet.
> https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git/commit/?h=togreg&id=e4ca0e59c39442546866f3dd514a3a5956577daf
> It just missed last cycle.
>
> > >> + } data __aligned(IIO_DMA_MINALIGN);
> > >
> > >Note, this is different alignment to the above. And isn't the buffer below should have it instead?
>
> While I'm here: No to this one. The s64 alignment is about
> performance of CPU access + consistency across CPU architectures.
> This one (which happens to always be 8 or more) is about DMA safety.
Right, but shouldn't...
> > >> + u32 spidata_tx[8];
> > >> + u8 reg_rx_buf[3];
> > >> + u8 reg_tx_buf[3];
...one of these also be cache aligned for DMA?
> > >> + u8 reset_buf[8];
--
With Best Regards,
Andy Shevchenko
