On Tue, Oct 08, 2024 at 03:37:00PM -0700, Deepak Gupta wrote: > Three architectures (x86, aarch64, riscv) have support for indirect branch > tracking feature in a very similar fashion. On a very high level, indirect > branch tracking is a CPU feature where CPU tracks branches which uses > memory operand to perform control transfer in program. As part of this > tracking on indirect branches, CPU goes in a state where it expects a > landing pad instr on target and if not found then CPU raises some fault > (architecture dependent) Reviewed-by: Mark Brown <broonie@xxxxxxxxxx>
Attachment:
signature.asc
Description: PGP signature
