Enable DPTX0 and DPTX1 along with their corresponding PHYs for
sa8775p-ride platform.
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 54 ++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
index adb71aeff339..5a38de918024 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
@@ -421,6 +421,48 @@
status = "okay";
};
+&mdss0 {
+ status = "okay";
+};
+
+&mdss0_dp0 {
+ status = "okay";
+
+ pinctrl-0 = <&dp0_hot_plug_det>;
+ pinctrl-names = "default";
+};
+
+&mdss0_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp0_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+};
+
+&mdss0_dp1 {
+ status = "okay";
+
+ pinctrl-0 = <&dp1_hot_plug_det>;
+ pinctrl-names = "default";
+};
+
+&mdss0_dp1_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss0_dp1_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+};
+
&pmm8654au_0_gpios {
gpio-line-names = "DS_EN",
"POFF_COMPLETE",
@@ -527,6 +569,18 @@
};
&tlmm {
+ dp0_hot_plug_det: dp0-hot-plug-det-state {
+ pins = "gpio101";
+ function = "edp0_hot";
+ bias-disable;
+ };
+
+ dp1_hot_plug_det: dp1-hot-plug-det-state {
+ pins = "gpio102";
+ function = "edp1_hot";
+ bias-disable;
+ };
+
ethernet0_default: ethernet0-default-state {
ethernet0_mdc: ethernet0-mdc-pins {
pins = "gpio8";
--
2.17.1
