On Mon, Oct 07, 2024 at 08:36:01PM +0530, Radhey Shyam Pandey wrote: > From: Abin Joseph <abin.joseph@xxxxxxx> > > Add s_axi_aclk AXI4 clock support. Traditionally this IP was used on > microblaze platforms which had fixed clocks enabled all the time. But > since its a PL IP, it can also be used on SoC platforms like Zynq > UltraScale+ MPSoC which combines processing system (PS) and user > programmable logic (PL) into the same device. On these platforms instead > of fixed enabled clocks it is mandatory to explicitly enable IP clocks > for proper functionality. > > So make clock a required property and also define max supported clock > constraints. > > Signed-off-by: Abin Joseph <abin.joseph@xxxxxxx> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Attachment:
signature.asc
Description: PGP signature
