Add device-tree support for the following SoMs: - Mercury SA1 (cyclone5) - Mercury+ SA2 (cyclone5) - Mercury+ AA1 (arria10) Further add device-tree support for the corresponding carrier boards: - Mercury+ PE1 - Mercury+ PE3 - Mercury+ ST1 Finally, provide generic support for combinations of the above with one of the boot-modes - SD - eMMC - QSPI Almost all of the above can be freely combined. Combinations are covered by the provided .dts files. This makes an already existing .dts file obsolete. Further minor fixes of the dtbs_checks are added separtely. The current approach shall be partly useful also for corresponding bootloader integration using dts/upstream. That's also one of the reasons for the .dtsi split. --- Lothar Rubusch (8): ARM: dts: socfpga: fix dtschema issues ARM: dts: socfpga: add Enclustra boot-mode dtsi ARM: dts: socfpga: add Enclustra base-board dtsi ARM: dts: socfpga: add Enclustra Mercury SA1 ARM: dts: socfpga: add Enclustra Mercury+ SA2 ARM: dts: socfpga: update Enclustra Mercury+ AA1 ARM: dts: socfpga: remove of generic PE1 dts ARM: dts: socfpga: add Enclustra SoM dts files .../devicetree/bindings/arm/altera.yaml | 24 ++- arch/arm/boot/dts/intel/socfpga/Makefile | 25 ++- arch/arm/boot/dts/intel/socfpga/socfpga.dtsi | 6 +- .../dts/intel/socfpga/socfpga_arria10.dtsi | 10 +- .../socfpga/socfpga_arria10_mercury_aa1.dtsi | 141 ++++++++++++++--- .../socfpga_arria10_mercury_aa1_pe1_emmc.dts | 16 ++ .../socfpga_arria10_mercury_aa1_pe1_qspi.dts | 16 ++ .../socfpga_arria10_mercury_aa1_pe1_sdmmc.dts | 16 ++ .../socfpga_arria10_mercury_aa1_pe3_emmc.dts | 16 ++ .../socfpga_arria10_mercury_aa1_pe3_qspi.dts | 16 ++ .../socfpga_arria10_mercury_aa1_pe3_sdmmc.dts | 16 ++ .../socfpga_arria10_mercury_aa1_st1_emmc.dts | 16 ++ .../socfpga_arria10_mercury_aa1_st1_qspi.dts | 16 ++ .../socfpga_arria10_mercury_aa1_st1_sdmmc.dts | 16 ++ .../socfpga/socfpga_arria10_mercury_pe1.dts | 55 ------- .../socfpga/socfpga_cyclone5_mercury_sa1.dtsi | 143 +++++++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe1_emmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa1_pe1_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa1_pe3_emmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa1_pe3_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa1_st1_emmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa1_st1_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts | 16 ++ .../socfpga/socfpga_cyclone5_mercury_sa2.dtsi | 146 ++++++++++++++++++ .../socfpga_cyclone5_mercury_sa2_pe1_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa2_pe3_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts | 16 ++ .../socfpga_cyclone5_mercury_sa2_st1_qspi.dts | 16 ++ ...socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts | 16 ++ ...cfpga_enclustra_mercury_bootmode_emmc.dtsi | 12 ++ ...cfpga_enclustra_mercury_bootmode_qspi.dtsi | 8 + ...fpga_enclustra_mercury_bootmode_sdmmc.dtsi | 8 + .../socfpga_enclustra_mercury_pe1.dtsi | 33 ++++ .../socfpga_enclustra_mercury_pe3.dtsi | 55 +++++++ .../socfpga_enclustra_mercury_st1.dtsi | 15 ++ 38 files changed, 980 insertions(+), 85 deletions(-) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts delete mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_emmc.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qspi.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sdmmc.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi -- 2.25.1
