Add support for selecting the data format within the AXI ADC ip. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@xxxxxxxxxx> --- changes in v2: - add ADI_AXI_ADC_CNTRL_3_CUSTOM_CONTROL_MSK and use regmap_update_bits drivers/iio/adc/adi-axi-adc.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c index ff48f26e02a3..363cc29b4c18 100644 --- a/drivers/iio/adc/adi-axi-adc.c +++ b/drivers/iio/adc/adi-axi-adc.c @@ -45,6 +45,9 @@ #define ADI_AXI_ADC_REG_CTRL 0x0044 #define ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK BIT(1) +#define ADI_AXI_ADC_REG_CNTRL_3 0x004c +#define ADI_AXI_ADC_CNTRL_3_CUSTOM_CONTROL_MSK GENMASK(7, 0) + #define ADI_AXI_ADC_REG_DRP_STATUS 0x0074 #define ADI_AXI_ADC_DRP_LOCKED BIT(17) @@ -271,6 +274,25 @@ static int axi_adc_interface_type_get(struct iio_backend *back, return 0; } +static int axi_adc_data_size_set(struct iio_backend *back, + ssize_t size) +{ + struct adi_axi_adc_state *st = iio_backend_get_priv(back); + unsigned int val; + + if (size <= 20) + val = 0; + else if (size <= 24) + val = 1; + else if (size <= 32) + val = 3; + else + return -EINVAL; + + return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3, + ADI_AXI_ADC_CNTRL_3_CUSTOM_CONTROL_MSK, val); +} + static struct iio_buffer *axi_adc_request_buffer(struct iio_backend *back, struct iio_dev *indio_dev) { @@ -308,6 +330,7 @@ static const struct iio_backend_ops adi_axi_adc_generic = { .test_pattern_set = axi_adc_test_pattern_set, .chan_status = axi_adc_chan_status, .interface_type_get = axi_adc_interface_type_get, + .data_size_set = axi_adc_data_size_set, }; static int adi_axi_adc_probe(struct platform_device *pdev) -- 2.46.2