On Mon, Sep 30, 2024, at 12:15, Herve Codina wrote:
> + pci-ep-bus@0 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /*
> + * map @0xe2000000 (32MB) to BAR0 (CPU)
> + * map @0xe0000000 (16MB) to BAR1 (AMBA)
> + */
> + ranges = <0xe2000000 0x00 0x00 0x00 0x2000000
> + 0xe0000000 0x01 0x00 0x00 0x1000000>;
I was wondering about how this fits into the PCI DT
binding, is this a child of the PCI device, or does the
"pci-ep-bus" refer to the PCI device itself?
Where do the "0x01 0x00 0x00" and "0x00 0x00 0x00" addresses
come from? Shouldn't those be "02000010 0x00 0x00" and
"02000014 0x00 0x00" to refer to the first and second
relocatable 32-bit memory BAR?
Arnd
