This patchset adds emaclite clock support. AXI Ethernet Lite IP can also be used on SoC platforms like Zynq UltraScale+ MPSoC which combines powerful processing system (PS) and user-programmable logic (PL) into the same device. On these platforms it is mandatory to explicitly enable IP clocks for proper functionality. Abin Joseph (3): dt-bindings: net: emaclite: Add clock support net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev() net: emaclite: Adopt clock support .../bindings/net/xlnx,emaclite.yaml | 3 +++ drivers/net/ethernet/xilinx/xilinx_emaclite.c | 22 ++++++++++--------- 2 files changed, 15 insertions(+), 10 deletions(-) base-commit: c824deb1a89755f70156b5cdaf569fca80698719 -- 2.34.1
