> +&mdio0 { > + phy0: ethernet-phy@1 { > + reg = <1>; > + }; > + > + phy1: ethernet-phy@2 { > + reg = <2>; > + }; > +}; Two PHYs on one bus... > + gmac1: ethernet@ffe7060000 { > + compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; > + reg = <0xff 0xe7060000 0x0 0x2000>, <0xff 0xec004000 0x0 0x1000>; > + reg-names = "dwmac", "apb"; > + interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC_AXI>; > + clock-names = "stmmaceth", "pclk"; > + snps,pbl = <32>; > + snps,fixed-burst; > + snps,multicast-filter-bins = <64>; > + snps,perfect-filter-entries = <32>; > + snps,axi-config = <&stmmac_axi_config>; > + status = "disabled"; > + > + mdio1: mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > + gmac0: ethernet@ffe7070000 { > + compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; > + reg = <0xff 0xe7070000 0x0 0x2000>, <0xff 0xec003000 0x0 0x1000>; > + reg-names = "dwmac", "apb"; > + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC_AXI>; And the MACs are listed in opposite order. Does gmac1 probe first, find the PHY does not exist, and return -EPROBE_DEFER. Then gmac0 probes successfully, and then sometime later gmac1 then reprobes? I know it is normal to list nodes in address order, but you might be able to avoid the EPROBE_DEFER if you reverse the order. Andrew