On Wed, Sep 25, 2024 at 07:20:03PM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@xxxxxxx> > > Per the current binding, QM/QXP DSPs are supposed to have 4 > power domains, while the rest just 1. For QM/QXP, the 4 power > domains are: DSP, DSP_RAM, MU13A, MU13B. > > First off, drop MU13A from the count. This is attached to the > platform device of lsio_mu13. This decreases the count to 3. > > Secondly, drop DSP and DSP_RAM from the count for QXP. These > are attached to the platform devices of the lpcgs (used as clock > providers for the DSP). What's a platform device? Sounds like some Linux implementation detail. The number of power islands for a h/w block shouldn't be changing. > > With this in mind, the number of required power domains for QXP > is 1 (MU13B), while for QM it's 3 (MU13B, DSP, DSP_RAM). > > Additionally, two extra power domains may be required in the case > of QM/QXP DSPs. These are IRQSTR_DSP and MU2A. For the nodes using > the "-hifi4" compatibles these PDs are optional, while for nodes using > the "-dsp" compatibles these are mandatory. > > These changes reflect all of this information. > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@xxxxxxx> > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 62 +++++++++++++++---- > 1 file changed, 49 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > index 9af40da5688e..e2f016af1048 100644 > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -51,8 +51,6 @@ properties: > description: > List of phandle and PM domain specifier as documented in > Documentation/devicetree/bindings/power/power_domain.txt > - minItems: 1 > - maxItems: 4 Top level should be the range of domains that covers all variants. > > mboxes: > description: > @@ -97,16 +95,55 @@ allOf: > properties: > compatible: > contains: > - enum: > - - fsl,imx8qxp-dsp > - - fsl,imx8qm-dsp > - - fsl,imx8qxp-hifi4 > - - fsl,imx8qm-hifi4 > + const: fsl,imx8qxp-hifi4 > then: > properties: > power-domains: > - minItems: 4 > - else: > + maxItems: 3 > + > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx8qxp-dsp > + then: > + properties: > + power-domains: > + minItems: 3 > + maxItems: 3 > + > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx8qm-dsp > + then: > + properties: > + power-domains: > + minItems: 5 > + maxItems: 5 > + > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx8qm-hifi4 > + then: > + properties: > + power-domains: > + minItems: 3 > + maxItems: 5 > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8mp-dsp > + - fsl,imx8mp-hifi4 > + - fsl,imx8ulp-dsp > + - fsl,imx8ulp-hifi4 > + then: > properties: > power-domains: > maxItems: 1 > @@ -157,10 +194,9 @@ examples: > <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, > <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; > clock-names = "ipg", "ocram", "core"; > - power-domains = <&pd IMX_SC_R_MU_13A>, > - <&pd IMX_SC_R_MU_13B>, > - <&pd IMX_SC_R_DSP>, > - <&pd IMX_SC_R_DSP_RAM>; > + power-domains = <&pd IMX_SC_R_MU_13B>, > + <&pd IMX_SC_R_IRQSTR_DSP>, > + <&pd IMX_SC_R_MU_2A>; > mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; > mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; > memory-region = <&dsp_reserved>; > -- > 2.34.1 >
