On 9/25/24 00:02, Conor Dooley wrote:
On Tue, Sep 24, 2024 at 06:31:52PM +0800, Macpaul Lin wrote:
The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'interrupts' property. The error message was:
infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
[0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
is too long
To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
the 'interrupts' property in the DT binding schema. This change allows for
flexibility in the number of interrupts for new SoCs
Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
This space should be removed.
Thanks! Will fix it in the next version.
Signed-off-by: Macpaul Lin <macpaul.lin@xxxxxxxxxxxx>
---
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
index ea6b0f5f24de..a00f1f0045b1 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
@@ -96,7 +96,8 @@ properties:
maxItems: 1
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 5
You need to add an items list here, and probably some per compatible
constraints. What are each of the itnerrupts for?
According to Friday Yang's comment,
The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. Each bank has a set of APB
registers
corresponding to the normal world, protected world 1/2/3,
and secure world, respectively.
Therefore, 5 interrupt numbers are needed.
clocks:
items:
--
2.45.2
Will try to fix it and add some description for MT8195.
I think this patch could be split as a separated patch from the origin
patch set. It'll take some time to refine the patch.
Thanks
Macpaul Lin
