On 9/24/2024 5:24 PM, Conor Dooley wrote:
On Tue, Sep 24, 2024 at 05:12:46PM +0300, Ciprian Costea wrote:
From: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx>
Add clock definitions for NXP LINFlexD UART bindings
and update the binding examples with S32G2 node.
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx>
---
.../bindings/serial/fsl,s32-linflexuart.yaml | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
index 4171f524a928..45fcab9e186d 100644
--- a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
+++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
@@ -34,6 +34,14 @@ properties:
interrupts:
maxItems: 1
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ipg
+ - const: lin
Can all devices have 2 clocks, or just the s32g2?
Hello Conor,
All devices (S32G2, S32G3 and S32V234) have 2 clocks for LINFlexD module.
They are: "lin" which is the frequency of the baud clock and "ipg" which
drives the access to the LINFlexD iomapped registers.
Best Regards,
Ciprian
+
required:
- compatible
- reg
@@ -48,3 +56,16 @@ examples:
reg = <0x40053000 0x1000>;
interrupts = <0 59 4>;
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ serial@401c8000 {
+ compatible = "nxp,s32g2-linflexuart",
+ "fsl,s32v234-linflexuart";
+ reg = <0x401c8000 0x3000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clks 14>, <&clks 13>;
+ clock-names = "lin", "ipg";
+ };
--
2.45.2
