Hi Krzysztof,
On 2024/9/23 17:31, Krzysztof Kozlowski wrote:
On Mon, Sep 23, 2024 at 10:53:25AM +0800, Frank Wang wrote:
Add compatible for the USB2 phy in the Rockchip RK3576 SoC.
Signed-off-by: Frank Wang <frank.wang@xxxxxxxxxxxxxx>
---
.../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
index 5254413137c64..214917e55c0b6 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
@@ -20,6 +20,7 @@ properties:
- rockchip,rk3366-usb2phy
- rockchip,rk3399-usb2phy
- rockchip,rk3568-usb2phy
+ - rockchip,rk3576-usb2phy
- rockchip,rk3588-usb2phy
- rockchip,rv1108-usb2phy
@@ -34,10 +35,16 @@ properties:
const: 0
clocks:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: phyclk - PHY input reference clocks.
+ - description: aclk and aclk_slv are optional and used for USB MMU.
clock-names:
+ minItems: 1
const: phyclk
+ const: aclk
+ const: aclk_slv
Please test... Not sure what you wanted to achieve here, but maybe
oneOf?
The "aclk" and "aclk_slv" clocks are new in RK3576, you mean the changes
should be like the below?
@@ -34,10 +35,20 @@ properties:
const: 0
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
clock-names:
- const: phyclk
+ minItems: 1
+ maxItems: 3
+ items:
+ oneOf:
+ - description: PHY input reference clocks.
+ const: phyclk
+ - description: aclk for USB MMU.
+ const: aclk
+ - description: aclk_slv for USB MMU.
+ const: aclk_slv
BR.
Frank
Best regards,
Krzysztof
