RISC-V privileged spec will be added with Svukte extension [1] Svukte introduce senvcfg.UKTE and hstatus.HUKTE bitfield. which makes user-mode access to supervisor memory raise page faults in constant time, mitigating attacks that attempt to discover the supervisor software's address-space layout. The following patches add - dt-binding of Svukte ISA string - CSR bit definition, ISA detection, senvcfg.UKTE enablement in kernel - KVM ONE_REG support for Svukte extension This patch series is based on v6.11 Link: https://github.com/riscv/riscv-isa-manual/pull/1564 [1] Signed-off-by: Max Hsu <max.hsu@xxxxxxxxxx> --- Max Hsu (3): dt-bindings: riscv: Add Svukte entry riscv: Add Svukte extension support riscv: KVM: Add Svukte extension support for Guest/VM Documentation/devicetree/bindings/riscv/extensions.yaml | 7 +++++++ arch/riscv/include/asm/csr.h | 2 ++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpufeature.c | 4 ++++ arch/riscv/kvm/vcpu_onereg.c | 1 + 6 files changed, 16 insertions(+) --- base-commit: 186617d883560848f801732bfecefa0c2f702a0f change-id: 20240920-dev-maxh-svukte-rebase-ce96dba93381 Best regards, -- Max Hsu <max.hsu@xxxxxxxxxx>
