On Mon, Sep 09, 2024 at 07:03:55PM +0200, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
>
> The PVU on the AM65 SoC is capable of restricting DMA from PCIe devices
> to specific regions of host memory. Add the optional property
> "memory-regions" to point to such regions of memory when PVU is used.
>
> Since the PVU deals with system physical addresses, utilizing the PVU
> with PCIe devices also requires setting up the VMAP registers to map the
> Requester ID of the PCIe device to the CBA Virtual ID, which in turn is
> mapped to the system physical address. Hence, describe the VMAP
> registers which are optional unless the PVU shall be used for PCIe.
> + memory-region:
> + maxItems: 1
> + description: |
> + phandle to a restricted DMA pool to be used for all devices behind
> + this controller. The regions should be defined according to
> + reserved-memory/shared-dma-pool.yaml.
> + Note that enforcement via the PVU will only be available to
> + ti,am654-pcie-rc devices.
> +
> required:
> - compatible
> - reg
> @@ -89,6 +102,13 @@ then:
> - power-domains
> - msi-map
> - num-viewport
You could add here schema expressing dependency, e.g.
if:
properties:
required:
- memory-region
then:
properties:
reg:
minItems: 6
reg-names:
minItems: 6
If I got your commit msg correctly.
Anyway, it's fine as is.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Best regards,
Krzysztof
