On Mon, 16 Sep 2024 09:19:02 +0000
"Esteban Blanc" <eblanc@xxxxxxxxxxxx> wrote:
> On Sat Sep 14, 2024 at 11:25 AM UTC, Jonathan Cameron wrote:
> > On Fri, 13 Sep 2024 15:46:17 +0200
> > Nuno Sá <noname.nuno@xxxxxxxxx> wrote:
> >
> > > On Fri, 2024-09-13 at 12:55 +0000, Esteban Blanc wrote:
> > > > On Fri Sep 13, 2024 at 10:18 AM UTC, Nuno Sá wrote:
> > > > > On Fri, 2024-09-13 at 09:55 +0000, Esteban Blanc wrote:
> > > > > > On Mon Aug 26, 2024 at 9:27 AM UTC, Jonathan Cameron wrote:
> > > > > > > On Thu, 22 Aug 2024 14:45:20 +0200
> > > > > > > Esteban Blanc <eblanc@xxxxxxxxxxxx> wrote:
> > > > > > > > +static const unsigned long ad4630_channel_masks[] = {
> > > > > > > > + /* Differential only */
> > > > > > > > + BIT(0) | BIT(2),
> > > > > > > > + /* Differential with common byte */
> > > > > > > > + GENMASK(3, 0),
> > > > > > > The packing of data isn't going to be good. How bad to shuffle
> > > > > > > to put the two small channels next to each other?
> > > > > > > Seems like it means you will want to combine your deinterleave
> > > > > > > and channel specific handling above, which is a bit fiddly but
> > > > > > > not much worse than current code.
> > > > > >
> > > > > > I can do it since that was what I had done in the RFC in the first place.
> > > > > > Nuno asked for in this email
> > > > > > https://lore.kernel.org/r/0036d44542f8cf45c91c867f0ddd7b45d1904d6b.camel@xxxxxxxxx/
> > > > > > :
> > > > > >
> > > > > > > > > * You're pushing the CM channels into the end. So when we a 2 channel
> > > > > > > > > device
> > > > > > > > > we'll have:
> > > > > >
> > > > > > > > > in_voltage0 - diff
> > > > > > > > > in_voltage1 - diff
> > > > > > > > > in_voltage2 - CM associated with chan0
> > > > > > > > > in_voltage0 - CM associated with chan1
> > > > > > > > >
> > > > > > > > > I think we could make it so the CM channel comes right after the channel
> > > > > > > > > where
> > > > > > > > > it's data belongs too. So for example, odd channels would be CM channels
> > > > > > > > > (and
> > > > > > > > > labels could also make sense).
> > > > > >
> > > > > > So that's what I did here :D
> > > > > >
> > > > > > For the software side off things here it doesn't change a lot of things
> > > > > > since we have to manipulate the data anyway, putting the extra byte at the
> > > > > > end or in between is no extra work.
> > > > > > For the offload engine however, it should be easier to ask for 24 bits
> > > > > > then 8 bits for each channel as it would return two u32 per "hardware
> > > > > > channel".
> > > > > >
> > > > > > In order to avoid having two different layouts, I was kind of sold by
> > > > > > Nuno's idea of having the CM in between each diff channel.
> > > > > >
> > > > >
> > > > > Tbh, I was not even thinking about the layout when I proposed the arrangement.
> > > > > Just
> > > > > made sense to me (from a logical point of view) to have them together as they
> > > > > relate
> > > > > to the same physical channel. FWIW, we're also speaking bytes in here so not sure
> > > > > if
> > > > > it's that important (or bad).
> > > >
> > > > The best we can do (if we managed to do it HDL wise) is to reorder the
> > > > data to get both CM byte in a single u32 after the 2 u32 of both diff
> > > > channel. That would be 3 u32 instead of 4.
> >
> > Entirely up to you. :)
>
> Ok so here is the plan I propose:
> 1. Use the layout of this patch (common byte channels just after their
> respective diff channel) as it should work out of the box for the offload
> engine (once it's merged [1]).
> 2. In case of performance issue, switch to the RFC layout (both diff
> channels then both common byte channels) and try to modify the HDL for
> the offload engine to reduce the memory footprint by one byte for the 2
> hardware channels case.
It's a bit of a risk as you might get someone making too many assumptions about
channel ordering in some specific purpose code - at that point this change
is an ABI break that someone noticed.
So I'd guess we'll stay with 1 for ever which is find.
Jonathan
>
> [1]: https://lore.kernel.org/lkml/20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@xxxxxxxxxxxx/
>
> Best regards,
>
