Hi, This implements proper GATE_LINK support following the suggestion from Stephen Boyd to use clk PM operations by creating MFD dynamically. This required some restructuring, since CLK_OF_DECLARE() is called before devices are available. Apart from improved power consumption, this fixes the runtime errors from the pmdomain driver (failed to set idle on domain '%s'). Changes since PATCHv9: * https://lore.kernel.org/linux-rockchip/20240325193609.237182-1-sebastian.reichel@xxxxxxxxxxxxx/ * drop patches 1 & 5 (merged) * keep reporting ENOENT for missing clocks after CRU has been fully initialized * drop module remove support for the linked gate clock driver Changes since PATCHv8: * https://lore.kernel.org/linux-rockchip/20240126182919.48402-1-sebastian.reichel@xxxxxxxxxxxxx/ * rebased to v6.9-rc1 * dropped all merged patches (i.e. all but the last one) * rewrote and split the final patch - should be easier to review - properly calls pm_clk_suspend/pm_clk_resume - now works on Orange Pi Changes since PATCHv7: * https://lore.kernel.org/all/20231213185114.47565-1-sebastian.reichel@xxxxxxxxxxxxx/ * rebased to v6.8-rc1 * Collected Reviewed-by/Acked-by from Krzysztof Kozlowski for DT binding patches * support nr_clk=0 in rockchip_clk_find_max_clk_id() for smatch Greetings, -- Sebstian Sebastian Reichel (5): clk: rockchip: support clocks registered late clk: rockchip: rk3588: register GATE_LINK later clk: rockchip: expose rockchip_clk_set_lookup clk: rockchip: implement linked gate clock support clk: rockchip: rk3588: drop RK3588_LINKED_CLK drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-rk3588.c | 116 ++++++++++++++++++------------ drivers/clk/rockchip/clk.c | 101 ++++++++++++++++++++++---- drivers/clk/rockchip/clk.h | 40 +++++++++++ drivers/clk/rockchip/gate-link.c | 85 ++++++++++++++++++++++ 5 files changed, 285 insertions(+), 58 deletions(-) create mode 100644 drivers/clk/rockchip/gate-link.c -- 2.45.2
