Remove the k3-am625-phyboard-lyra-1-4-ghz-opp overlay. We now
configure the a53_opp_table to include a 1.4 GHz node and set our
VDD_CORE to 0.85v in the k3-am62-phycore-som.dtsi. This change is to
match our PMIC which is now set to output 0.85v by default.
Signed-off-by: Garrett Giordano <ggiordano@xxxxxxxxxx>
---
.../k3-am625-phyboard-lyra-1-4-ghz-opp.dtso | 20 -------------------
1 file changed, 20 deletions(-)
delete mode 100644 arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso
diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso
deleted file mode 100644
index 6ec6d57ec49c..000000000000
--- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only OR MIT
-/*
- * Copyright (C) 2024 PHYTEC America LLC
- * Author: Nathan Morrisson <nmorrisson@xxxxxxxxxx>
- */
-
-/dts-v1/;
-/plugin/;
-
-&vdd_core {
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-};
-
-&a53_opp_table {
- opp-1400000000 {
- opp-hz = /bits/ 64 <1400000000>;
- opp-supported-hw = <0x01 0x0004>;
- };
-};
--
2.25.1
