On Thu, Sep 12, 2024 at 12:44:34PM GMT, Mahadevan wrote: > Document the DPU for Qualcomm SA8775P platform. Please fix errors reported by DT tools before submission. > > Signed-off-by: Mahadevan <quic_mahap@xxxxxxxxxxx> > --- > .../display/msm/qcom,sa8775p-dpu.yaml | 120 ++++++++++++++++++ > 1 file changed, 120 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sa8775p-dpu.yaml > > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-dpu.yaml > new file mode 100644 > index 000000000000..4e1bf5ffa2ed > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-dpu.yaml > @@ -0,0 +1,120 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/qcom,sa8775p-dpu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Technologies, Inc. SA8775P Display DPU > + > +maintainers: > + - Mahadevan <quic_mahap@xxxxxxxxxxx> > + > +$ref: /schemas/display/msm/dpu-common.yaml# > + > +properties: > + compatible: > + const: qcom,sa8775p-dpu > + > + reg: > + items: > + - description: Address offset and size for mdp register set > + - description: Address offset and size for vbif register set > + > + reg-names: > + items: > + - const: mdp > + - const: vbif > + > + clocks: > + items: > + - description: Display hf axi AXI > + - description: Display ahb AHB > + - description: Display lut > + - description: Display core > + - description: Display vsync > + > + clock-names: > + items: > + - const: bus > + - const: iface > + - const: lut > + - const: core > + - const: vsync > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> > + #include <dt-bindings/clock/qcom,gcc-sa8775p.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interconnect/qcom,sa8775p.h> > + #include <dt-bindings/power/qcom,rpmhpd.h> > + > + display-controller@ae01000 { > + compatible = "qcom,sa8775p-dpu"; > + reg = <0 0x0ae01000 0 0x8f000>, > + <0 0x0aeb0000 0 0x2008>; > + reg-names = "mdp", "vbif"; > + > + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, > + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>, > + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>, > + <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; > + clock-names = "bus", > + "iface", > + "lut", > + "core", > + "vsync"; > + > + assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; > + assigned-clock-rates = <19200000>; > + operating-points-v2 = <&mdss0_mdp_opp_table>; > + power-domains = <&rpmhpd RPMHPD_MMCX>; > + > + interrupt-parent = <&mdss0>; > + interrupts = <0>; empty line > + ports { > + #address-cells = <1>; > + #size-cells = <0>; empty line > + port@0 { > + reg = <0>; > + dpu_intf0_out: endpoint { > + remote-endpoint = <&mdss0_dp0_in>; > + }; > + }; > + }; > + > + mdss0_mdp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-375000000 { > + opp-hz = /bits/ 64 <375000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-500000000 { > + opp-hz = /bits/ 64 <500000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + > + opp-575000000 { > + opp-hz = /bits/ 64 <575000000>; > + required-opps = <&rpmhpd_opp_turbo>; > + }; > + > + opp-650000000 { > + opp-hz = /bits/ 64 <650000000>; > + required-opps = <&rpmhpd_opp_turbo_l1>; > + }; > + }; > + }; > +... > -- > 2.34.1 > -- With best wishes Dmitry
