On Sun, 2024-09-08 at 18:28 +0200, Christophe JAILLET wrote:
> Le 05/09/2024 à 17:17, Angelo Dureghello a écrit :
> > From: Angelo Dureghello
> > <adureghello-rdvid1DuHRBWk0Htik3J/w@xxxxxxxxxxxxxxxx>
> >
> > Add support for ad3552r-axi, where ad3552r has to be controlled
> > by the custom (fpga-based) ad3552r AXI DAC IP.
>
> ...
>
> > +static int ad3552r_axi_buffer_postenable(struct iio_dev *indio_dev)
> > +{
> > + struct ad3552r_axi_state *st = iio_priv(indio_dev);
> > + struct iio_backend_data_fmt fmt = {
> > + .type = IIO_BACKEND_DATA_UNSIGNED
> > + };
> > + int loop_len, val, err;
> > +
> > + /* Inform DAC chip to switch into DDR mode */
> > + err = axi3552r_qspi_update_reg_bits(st->back,
> > +
> > AD3552R_REG_ADDR_INTERFACE_CONFIG_D,
> > + AD3552R_MASK_SPI_CONFIG_DDR,
> > + AD3552R_MASK_SPI_CONFIG_DDR,
> > 1);
> > + if (err)
> > + return err;
> > +
> > + /* Inform DAC IP to go for DDR mode from now on */
> > + err = iio_backend_ddr_enable(st->back);
> > + if (err)
> > + goto exit_err;
>
> I don't know if it can be an issue, but iio_backend_ddr_disable() is
> called if iio_backend_ddr_enable() fails.
>
>
I don't think it would be an issue but conceptually it does not really make
sense. Yeah, it should be fixed...
- Nuno Sá
