Revise duty cycle SMB11 and SMB16 to high: 40%, low: 60%, to meet 400kHz-i2c clock low time spec (> 1.3 us) from EE request Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@xxxxxxxxxx> --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index c2994651e747..c940d23c8a4b 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -761,6 +761,7 @@ eeprom@54 { &i2c10 { status = "okay"; bus-frequency = <400000>; + i2c-clk-high-min-percent = <40>; i2c-mux@74 { compatible = "nxp,pca9544"; i2c-mux-idle-disconnect; @@ -1314,6 +1315,7 @@ &i2c15 { mctp-controller; multi-master; bus-frequency = <400000>; + i2c-clk-high-min-percent = <40>; mctp@10 { compatible = "mctp-i2c-controller"; -- 2.25.1