From: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
Reserve a 64M memory region and ensure that all PCI devices do their DMA
only inside that region. This is configured via a restricted-dma-pool
and enforced with the help of the first PVU.
The pool size may be adjusted via DT fixup during boot by the firmware.
The location is chosen to allow up to 512M for special needs without
causing conflicts.
Applying this isolation which is not totally free in terms of overhead
and memory consumption makes only sense for variants that support secure
booting. These are the advanced-class variants.
Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
---
.../ti/k3-am6548-iot2050-advanced-common.dtsi | 21 ++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi
index ae842b85b70d..dc75e3ea9a6b 100644
--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) Siemens AG, 2018-2021
+ * Copyright (c) Siemens AG, 2018-2024
*
* Authors:
* Le Jin <le.jin@xxxxxxxxxxx>
@@ -20,6 +20,25 @@ memory@80000000 {
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
+
+ reserved-memory {
+ pci_restricted_dma_region: restricted-dma@c0000000 {
+ compatible = "restricted-dma-pool";
+ reg = <0 0xc0000000 0 0x4000000>;
+ };
+ };
+};
+
+&pcie0_rc {
+ memory-region = <&pci_restricted_dma_region>;
+};
+
+&pcie1_rc {
+ memory-region = <&pci_restricted_dma_region>;
+};
+
+&ti_pvu0 {
+ status = "okay";
};
&main_pmx0 {
--
2.43.0
