Map all clock-controller memory region in a single block for EN7581 SoC. Introduce chip_scu regmap pointer since EN7581 SoC will access chip-scu memory area through a syscon node. REG_PCIE*_MEM and REG_PCIE*_MEM_MASK registers (PBUS_CSR) are not part of the scu block on the EN7581 SoC and they are used to select the PCIE ports on the PBUS, so configure them via in the PCIE host driver. This series does not introduce any backward incompatibility since the dts for EN7581 SoC is not upstream yet. --- Changes in v2: - fix smatch warnings in en7581_register_clocks() - fix dt-bindings for EN7581 clock - move REG_PCIE*_MEM and REG_PCIE*_MEM_MASK register configuration in the PCIE host driver - Link to v1: https://lore.kernel.org/r/20240831-clk-en7581-syscon-v1-0-5c2683541068@xxxxxxxxxx --- Lorenzo Bianconi (7): dt-bindings: clock: airoha: Update reg mapping for EN7581 SoC. clk: en7523: remove REG_PCIE*_{MEM,MEM_MASK} configuration clk: en7523: move clock_register in hw_init callback clk: en7523: introduce chip_scu regmap clk: en7523: fix estimation of fixed rate for EN7581 clk: en7523: move en7581_reset_register() in en7581_clk_hw_init() clk: en7523: map io region in a single block .../bindings/clock/airoha,en7523-scu.yaml | 23 +- drivers/clk/clk-en7523.c | 309 ++++++++++++++------- 2 files changed, 217 insertions(+), 115 deletions(-) --- base-commit: f0e992956eb617c8f16119944bfe101dea074147 change-id: 20240823-clk-en7581-syscon-100c6ea60c50 prerequisite-change-id: 20240705-for-6-11-bpf-a349efc08df8:v2 Best regards, -- Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
